Primary-source research on AI, from the silicon up.
Deep technical notes for people who need to know what is real at the metal, investors, consultancies, and teams building AI. Every claim is sourced.
How an AI Accelerator Actually Works: Matmul, Memory Hierarchy, and Why Bandwidth Is the Bottleneck
A ground-up tour of the matrix-multiply units, on-chip SRAM, and HBM that make up a modern AI chip, and why the memory wall, not the FLOPs, governs performance.
Training vs Inference Economics: Why the Cost Curves Diverge, and What It Means for Buyers
Training is a capital event; inference is a marginal cost that compounds with usage. The two obey different physics, and conflating them leads to bad purchasing decisions.
Mixture-of-Experts, Speculative Decoding, and KV-Cache: Where the Next Efficiency Gains Come From
The three techniques quietly reshaping inference cost, sparse activation, draft-and-verify decoding, and smarter attention-state management.
The Datacenter Buildout No One Budgeted For: Power, Cooling, and Interconnect as the Real Constraint
The binding constraint on AI is no longer chips, it is megawatts, water, and the network fabric between racks. A look at the physical limits of scale.
AI Designing AI Chips: How Agentic and ML Tooling Is Changing Place-and-Route, Verification, and EDA
Machine learning and agentic tooling are moving into the chip-design loop, from floorplanning to verification. What is real, what is hype, and what it changes.
Applied AI in the Wild: Lessons From Building a Real-Estate AI Product (Tribunus Labs)
What actually breaks when you ship AI into a regulated, document-heavy workflow, drawn from building applied AI products end to end.